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46
Table of Contents
Features...
...and More Features
General Description
Functional Description
Logic Array Blocks
Macrocells
Expander Product Terms
Shareable Expanders
Parallel Expanders
Programmable Interconnect Array
I/O Control Blocks
In-System Programmability
Programming Sequence
Programming Times
Programming a Single MAX 3000A Device
Programming with External Hardware
IEEE Std. 1149.1 (JTAG) Boundary-Scan Support
Programmable Speed/Power Control
Output Configuration
MultiVolt I/O Interface
Open-Drain Output Option
Slew-Rate Control
Design Security
Generic Testing
Operating Conditions
Power Sequencing & Hot-Socketing
Timing Model
Power Consumption
Device Pin-Outs
Revision History
Version 3.5
Version 3.4
Version 3.3
Version 3.2
Version 3.1
Version 3.0